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EEE4377: Mixed Signal ICs

EEE4377 — EEE4377
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3 credit hours 45 contact hours Prerequisites: Statewide SCNS: EEE 4313 or EEE 4376 - that is, either the digital IC design course or the analog IC design course. WARNING: the two entry routes are genuinely different preparations, and this course needs BOTH sides; whichever one you did not take is the half you will have to pick up as you go. Carried at FAMU. v1.0

Course Description

EEE 4377 Mixed Signal ICs is the course at the boundary between the analogue and digital halves of an integrated circuit — the boundary where nearly every real system has to work, and where most of its hard problems live. Sensors, radios, instruments and control systems all take continuous physical signals into a digital processor and send digital commands back out, and the circuits that make that crossing are what this course designs.

The Statewide Course Numbering System titles it Mixed Signal ICs and describes it as an “introduction to mixed signal processing using analog and digital integrated circuits. Topics include fundamentals of sampled data systems, nonlinear and dynamic analog circuits, Nyquist-rate data converters, over-sampling data converters, and digital filters. Includes use of computer-aided-design programs.” The statewide prerequisite is EEE 4313 or EEE 4376.

Florida A&M University carries the course at 3 credits under the statewide title. The FAMU–FSU College of Engineering bulletin lists it as Mixed Signal ICs and describes it in matching terms.

⚠ The prerequisite is a genuine fork, and it has consequences. A student may enter this course from either the digital IC design side (EEE 4313) or the analogue IC design side (EEE 4376). Both routes are legitimate, but mixed-signal design needs both halves, so whichever route you took, the other half is the one you will be acquiring during the term. The Special Information section says what to expect from each direction.

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Special Information

⚠⚠ Two entry routes, and the half you did not take

The statewide prerequisite is EEE 4313 (CMOS Digital IC Design) or EEE 4376 (Introduction to Analog IC Design). That “or” is generous, and it means the class arrives split. What to expect:

Entering from EEE 4313 (digital)Entering from EEE 4376 (analogue)
Comfortable with: CMOS switching, timing, clocking, logic, layout rulesComfortable with: matching, current mirrors, differential pairs, op-amps, noise, compensation
Will need to acquire: device matching, noise analysis, op-amp design, settling and stabilityWill need to acquire: clocking disciplines, digital logic in the control path, timing analysis
Hardest part: the switched-capacitor and op-amp material in the first halfHardest part: the digital decimation filters and clocking in the second half

The honest advice: take both prerequisite courses if your schedule permits. Mixed-signal design is where the two disciplines meet, and a student with only one of them spends part of the term reading the other course’s textbook. Where that is not possible, identify your weaker side in week one and address it deliberately rather than hoping it will not matter — it will.

⚠ Course-code variation across Florida

Mixed-signal design is not widely offered at undergraduate level in Florida, and where it appears the numbering varies:

SCNS equivalency does not cross course numbers. Because the subject is offered narrowly, expect this course to articulate as a technical elective rather than as a named requirement, which is usually what a student wants from an elective in any case. Carry the syllabus and, if you completed a design project, keep it.

Position in the curriculum

EEE 4377 is a senior-level elective and, at the FAMU–FSU College of Engineering, close to the terminal undergraduate course in the integrated-circuit track. It leads naturally into EEE 5378 at graduate level and into research in data converters and mixed-signal systems.

It pairs well with EEE 4510 Digital Signal Processing, which supplies the filter-design machinery that the decimation and noise-shaping material assumes. Students who have taken DSP find the delta-sigma section substantially easier, because noise shaping is a filtering argument dressed in circuit clothing.

Difficulty and time commitment

This is a demanding senior elective. Its characteristic difficulty is holding two mental models at once: the sampled-data, frequency-domain view and the transistor-level circuit view. A delta-sigma modulator has to be understood simultaneously as a noise-shaping filter and as a set of switched capacitors, comparators and clocks, and a student who can only do one of the two cannot design it.

The second difficulty is practical: mixed-signal simulation is slow. Establishing a converter’s SNR requires a long transient run followed by an FFT, and getting that right — coherent sampling, an appropriate window, enough cycles — is itself a skill. Runs take hours, so the design iteration cycle is measured in days.

Plan on ten to twelve hours a week, and start any design project immediately. Simulation time cannot be compressed at the end of a term.

Articulation and transfer

SCNS records EEE 4377 as guaranteed to transfer to an institution offering the same course. One Florida institution carries the undergraduate number, so read that narrowly. The course is upper-division, carries 3 credits, and has no general-education or Gordon Rule designation.

FE exam relevance

The NCEES Fundamentals of Engineering (Electrical and Computer) exam covers sampling, analogue-to-digital and digital-to-analogue conversion and digital filters within its Signal Processing and Electronics topic areas — at a considerably lower level than this course, but with genuine overlap. A student who has taken this course should find the FE’s conversion and sampling questions straightforward.

AI Integration

This course sits at an interesting point with respect to AI: the circuits it designs are the ones that feed machine learning systems, and the design task itself is one that automation has partially but not fully solved.

Where AI is genuinely used in the discipline. Machine learning is applied to analogue and mixed-signal sizing — given a topology, finding device dimensions meeting a specification — and to design-space exploration, and commercial tools now ship these features. Digitally assisted analogue design is a more fundamental connection: modern converters routinely correct analogue imperfections in the digital domain, and adaptive and learned calibration is an active research area. A student in this course is learning the architecture that makes that possible.

There is also a direct application link worth naming: the data converter is the first stage of every machine learning system that touches the physical world. The quantisation, jitter and linearity limits taught here set the ceiling on what any downstream model can recover, which is a useful corrective to the assumption that model quality is the binding constraint.

Where a general-purpose assistant helps in coursework. Explaining noise shaping or why a pipelined ADC needs inter-stage gain; generating MATLAB behavioural models of converters; writing FFT analysis and windowing scripts; setting up corner sweeps; and interpreting mixed-mode simulator errors, which are notoriously opaque.

⚠ Where it fails, and why the failure coincides with this course’s subject. The characteristic error of an AI tool asked a data converter question is to quote the ideal SNR relationship — 6.02N + 1.76 dB — as though it described a real converter. That formula assumes perfect quantisation and nothing else: no thermal noise, no jitter, no mismatch, no distortion. The entire content of this course is what happens to that number in practice, where a 16-bit converter achieves perhaps 13 effective bits and the gap is the design problem. A confident answer that returns the ideal figure has skipped the course.

A second failure is specific and consequential: models generate converter output spectra and SNR figures from simulation setups that are wrong in a way that inflates the result. Non-coherent sampling without windowing spreads a tone across bins and can make distortion disappear; too few FFT points hides the noise floor; measuring SNR over the wrong bandwidth flatters an oversampling converter enormously. These are exactly the measurement errors the course teaches you to avoid, and none of them produces an obviously wrong-looking plot.

Third: models routinely omit jitter from a high-speed converter analysis. Clock jitter sets the achievable SNR at high input frequencies regardless of resolution, and it is the constraint that dominates modern high-speed converter design — and it is absent from the textbook formulae a model reaches for first.

The engineer’s responsibility. A converter specification is a claim about what a system can measure, and everything downstream inherits it. The habit worth forming here is to ask of every reported SNR or ENOB: at what input frequency, over what bandwidth, with what clock, and measured how? An FFT plot with its sampling and windowing conditions stated is evidence; a number is not.

Academic integrity. FAMU and FSU both maintain academic honour policies covering AI-generated work. Design justification and analysis are normally expected to be your own even where scripting and simulation assistance is permitted. Generated simulation results or converter spectra are data fabrication and are treated more seriously than plagiarism. Ask before you rely on a tool, and disclose its use where the syllabus requires it.


Generated September 9, 2026 · Updated September 9, 2026