EEE4309C: Electronics II

Course Description

EEE 4309C Electronics II is the second electronics course at the University of Central Florida, carried at 4 credits with an integrated laboratory. UCF describes it as covering “introduction to logic circuits; bipolar, MOS and CMOS families; flip-flops and memory cells, comparators and timing circuits; A/D and D/A converters,” with a prerequisite of EEE 3307C Electronics I.

⚠⚠ Read this before assuming you know what the course is. The title says Electronics II, but UCF’s course is digital and mixed-signal electronics at the device level — logic families, flip-flops and memory cells, comparators, timing circuits and data converters. That is not what “Electronics II” means at most other institutions, where it denotes a second analogue course built on feedback theory and operational amplifiers.

The Statewide Course Numbering System titles the 4309 number Electronic Circuits 2 and describes it as covering “advanced electronic design techniques … frequency response of amplifiers, analysis and design of power amplifiers, oscillator design and analysis, power supply design, analysis and applications of linear and digital integrated circuits. Laboratory is included.” The statewide description is predominantly analogue; UCF’s is predominantly digital. Both are legitimate second electronics courses, and both are described honestly by their authors — but a student who takes one has not covered the other. The Special Information section sets out what to do about that.

This guide is written to UCF’s course, because UCF is the only Florida institution carrying the suffixed number EEE 4309C and its catalog description is what a registering student will actually receive. The statewide reading is covered as a labelled variant.

Learning Outcomes

Required Outcomes (UCF reading — digital and mixed-signal)

• Analyse the transistor-level operation of logic gates in bipolar (TTL, ECL) and MOS (NMOS, CMOS) families.
• Derive and interpret the CMOS inverter voltage transfer characteristic, and determine noise margins from it.
• Calculate propagation delay, rise and fall times, and the effect of fan-out and load capacitance on switching speed.
• Analyse static and dynamic power dissipation in CMOS, including short-circuit and leakage components, and evaluate the power–delay product.
• Design static CMOS combinational gates, including transistor sizing for balanced rise and fall.
• Analyse latch and flip-flop circuits at the transistor level, and explain setup, hold and metastable behaviour in terms of circuit operation rather than as abstract timing rules.
• Analyse static and dynamic memory cells (SRAM and DRAM), including read and write operation and sense amplification.
• Design and analyse comparators, including hysteresis, and timing circuits such as multivibrators and the 555 timer.
• Explain the operation of digital-to-analogue converter architectures (binary-weighted, R-2R ladder) and specify resolution and linearity.
• Explain the operation of analogue-to-digital converter architectures (flash, successive-approximation, dual-slope, sigma-delta) and evaluate the trade-off among speed, resolution and complexity.
• Interface analogue and digital subsystems correctly, addressing level shifting, grounding and noise coupling.
• Verify circuit designs by SPICE simulation and by laboratory measurement, and reconcile the two.

Optional Outcomes

• Analyse dynamic, domino and pass-transistor logic and compare them against static CMOS.
• Analyse feedback amplifier stability using gain and phase margin (the emphasis of the statewide reading, and of second electronics courses elsewhere).
• Design power output stages and evaluate efficiency and thermal behaviour.
• Design linear and switching voltage regulators.
• Analyse oscillators using the Barkhausen criterion.
• Evaluate sampling, aliasing and quantisation noise in a data-acquisition chain.

Major Topics

Required Topics

• Introduction to logic circuits — the transition from analogue amplification to switching, logic levels, noise margins and the meaning of a digital abstraction built on analogue devices.
• Bipolar logic families — TTL structure and variants, Schottky clamping, emitter-coupled logic and its speed/power trade-off.
• MOS and CMOS logic — the NMOS inverter, the CMOS inverter transfer characteristic, static and dynamic power, propagation delay, transistor sizing and fan-out.
• CMOS gate design — pull-up and pull-down network construction, complex gates, and the layout-independent sizing rules.
• Flip-flops and latches at circuit level — cross-coupled inverters, transmission-gate latches, master–slave structures, setup and hold origins, metastability.
• Memory cells — the six-transistor SRAM cell, read and write stability, the one-transistor DRAM cell, refresh, and sense amplifier operation.
• Comparators and timing circuits — open-loop and hysteretic comparators, Schmitt triggers, astable and monostable multivibrators, the 555 timer.
• Digital-to-analogue conversion — binary-weighted and R-2R architectures, resolution, monotonicity, INL and DNL, settling time and glitch energy.
• Analogue-to-digital conversion — flash, successive-approximation, dual-slope and sigma-delta architectures; sampling, aperture and quantisation error.
• Mixed-signal interfacing — level shifting, grounding and ground bounce, decoupling and substrate coupling.
• Laboratory practice — building and measuring the circuits above, and correlating measurement with SPICE.

Optional Topics

• Dynamic and domino logic; pass-transistor and transmission-gate logic families.
• Feedback amplifier analysis, stability and frequency compensation (the statewide emphasis).
• Power amplifier classes, crossover distortion, efficiency and heat sinking.
• Linear and switching voltage regulator design.
• Oscillator design and frequency stability.
• Phase-locked loops and clock generation.

Resources & Tools

• Microelectronic Circuits (Sedra and Smith) remains the common reference and contains substantial CMOS digital circuit material in its later chapters. Digital Integrated Circuits: A Design Perspective (Rabaey, Chandrakasan and Nikolic) is the standard reference for the CMOS logic, memory and timing material and is the better book for this course’s core. CMOS Digital Integrated Circuits (Kang and Leblebici) is also widely used.
• SPICE simulation — LTspice, PSpice or Cadence tools; transient analysis of switching waveforms and DC transfer analysis of inverters are the two workhorse analyses here.
• Laboratory instruments — digital storage oscilloscope with adequate bandwidth for switching edges, function generator, logic analyser, DC supplies and multimeters. Measuring a propagation delay of a few nanoseconds teaches probe bandwidth and grounding in a way no lecture does.
• Devices — CD4007 MOSFET arrays for building inverters from discrete transistors, 74HC and 74LS logic families for family comparison, LM311 and LM339 comparators, NE555 timers, and DAC/ADC evaluation parts from Texas Instruments and Analog Devices.
• Reference material — manufacturer datasheets (Texas Instruments, ON Semiconductor, Analog Devices) and TI’s logic family application notes, which are the standard industry reference for interfacing and noise margin questions. UCF’s Department of Electrical and Computer Engineering publishes laboratory manuals for its ECE courses.

Career Pathways

• Mixed-signal design engineer — the most direct destination, and the data converter material here is its foundation.
• Digital IC design engineer and VLSI design engineer (SOC 17-2061, Computer Hardware Engineers) — UCF continues this line in EEE 4334 Introduction to VLSI Design.
• Electronics engineer (SOC 17-2072) and electrical engineer (SOC 17-2071).
• Hardware design engineer and signal integrity engineer — the grounding, decoupling and noise-margin material is directly applicable.
• Test engineer in semiconductor manufacturing; applications engineer at a converter or logic vendor.
• Florida employers include Lockheed Martin (Orlando — the single largest employer of UCF electrical and computer engineering graduates), L3Harris (Melbourne and Palm Bay), Northrop Grumman (Melbourne), Siemens Energy and Mitsubishi Power (Orlando), Leidos and SAIC, the simulation and training cluster in Central Florida Research Park adjacent to the UCF campus, and Space Coast employers including Blue Origin, SpaceX, Boeing and Amazon Kuiper.

Special Information

⚠⚠ Two different subjects share this number — know which one you are taking

The divergence described at the top of this guide is the single most important thing on this page:

UCF’s EEE 4309C	The statewide reading of 4309
Logic circuits; bipolar, MOS and CMOS families	Frequency response of amplifiers
Flip-flops and memory cells	Power amplifier analysis and design
Comparators and timing circuits	Oscillator design and analysis
A/D and D/A converters	Power supply design
Overlap: analysis and applications of linear and digital integrated circuits; laboratory included in both

A syllabus test. If the assessed work is CMOS inverter sizing, propagation-delay calculation, SRAM cell analysis and converter architecture comparison, you are in UCF’s digital version. If it is feedback topology identification, phase margin, and class AB output stage design, you are in the analogue version taught elsewhere.

⚠ The consequence that matters. A UCF student who has taken EEE 4309C has not covered feedback amplifier theory and operational amplifier design in a second-course treatment. Those topics appear in UCF’s curriculum elsewhere, but a graduate school or employer reading “Electronics II” on a transcript will assume the analogue content. Conversely, a student transferring into UCF with an analogue Electronics II has not covered the digital and mixed-signal material and may find EEE 4334 VLSI Design harder than expected. In either direction, check the topic list rather than the title, and be prepared to fill the gap.

⚠ Course-code variation across Florida

Second-course electronics is numbered four different ways in Florida, and the titles do not track the content:

• EEE 4309C — UCF (4 credits, integrated laboratory, digital/mixed-signal emphasis). The University of North Florida carries the number split as EEE 4309 Microelectronics II (3 credits) plus EEE 4309L Electronic Circuits II (1 credit) — note that UNF’s lecture and laboratory carry different titles from each other.
• EEE 4301 (+ EEE 4301L) — FAMU, FSU, USF (analogue emphasis).
• EEE 4306C / EEE 4306 — University of Florida; EEE 4306 + EEE 4306L — University of West Florida.
• EEE 4304C — Florida International University (4 credits) and Florida Polytechnic University (3 credits, titled Analog Electronics).

SCNS equivalency does not cross course numbers. Credit transfers; the requirement match is what breaks, because receiving programmes name prerequisites by number. Carry the syllabus and request substitutions early.

Credit structure and the C suffix

UCF carries EEE 4309C at 4 credits with a scheduled laboratory — roughly six contact hours a week across lecture and laboratory. This is more scheduled time than most 4-credit courses and considerably more than the 3-credit versions elsewhere. When comparing against a 3-credit course at another institution, you are not comparing like with like: UCF’s integrated version includes laboratory work that the 3-credit lecture-only versions place in a separate 1-credit course.

Prerequisites

UCF requires EEE 3307C Electronics I (4 credits). What that stands for is fluency in device models, biasing and small-signal analysis — but note that this course pivots toward switching behaviour, where the device spends its time in cut-off and triode rather than in saturation. Students who learned Electronics I as “bias into the active region and linearise” must now think about the regions they were previously taught to avoid, and that reorientation is where the course’s early difficulty sits.

Position in the curriculum

EEE 4309C is offered every semester at UCF and sits in the junior or senior year following EEE 3307C. It supports EEE 4334 Introduction to VLSI Design and UCF’s semiconductor and hardware-security electives, and its converter and interfacing material is directly useful in senior design projects involving sensors or instrumentation.

Difficulty and time commitment

The material is conceptually less abstract than feedback theory but more detailed, and the laboratory is demanding because measuring nanosecond-scale switching behaviour is genuinely difficult with student-grade instruments. Plan on ten to twelve hours a week across lecture preparation, laboratory sessions and reports, and expect the laboratory to be the larger share.

Articulation and transfer

SCNS records EEE 4309C as guaranteed to transfer to an institution offering the same course. UCF is the only Florida institution carrying this exact number, so the practical reach is narrow. Treat it as a course requiring substitution review, and retain both the syllabus and a laboratory report. The course is upper-division and carries no general-education or Gordon Rule designation.

FE exam relevance

The NCEES Fundamentals of Engineering (Electrical and Computer) exam covers digital systems and electronics, including logic families, noise margins, and data conversion. UCF’s version of this course maps unusually well onto the digital and computer-systems portions of the exam, better than a conventional analogue Electronics II would.

AI Integration

Mixed-signal design sits at a boundary where AI assistance behaves quite differently on either side, and noticing that is itself instructive.

Where it helps. Explaining why a CMOS inverter’s switching threshold shifts with transistor sizing; walking through the read and write operation of a six-transistor SRAM cell; comparing converter architectures against a requirement; generating SPICE netlists and transient analysis scripts; and interpreting simulator convergence failures, which are common in switching circuits and unhelpfully reported.

⚠ Where it fails, and why it matters in this course specifically. The characteristic error is that a model reasons about digital circuits using the digital abstraction, which is precisely the abstraction this course exists to take apart. Asked about a logic gate, it will answer in terms of ones and zeros — but the question here is what the voltage actually does between them, how long it takes, how much charge it costs, and how close the noise margin is to being violated. A generated answer that says a CMOS inverter “outputs logic low when the input is logic high” is correct and useless; the course asks what V_OL is, what the propagation delay is at a given fan-out, and whether the noise margin survives the ground bounce.

Two concrete failure modes follow. Models routinely give propagation delay and power figures that are not tied to any process, supply voltage or load — numbers that sound authoritative and mean nothing without those parameters. And they will describe converter specifications (INL, DNL, ENOB) correctly in the abstract while mis-relating them to a specific architecture, for instance attributing flash-converter speed to a successive-approximation design.

The engineer’s responsibility. A timing or power figure is meaningless without the conditions it was obtained under: process, supply, temperature and load. A SPICE transient run states those conditions explicitly; a generated number does not. If you cannot state the conditions, you do not have a result — and in mixed-signal work, unstated conditions are how designs pass simulation and fail in silicon.

Academic integrity. UCF’s Rules of Conduct on academic misconduct apply to AI-generated work, and policy varies by instructor and by assignment type. Laboratory measurement and design analysis are normally expected to be your own even where simulation assistance is permitted — and generated laboratory data is data fabrication, which is treated more seriously than plagiarism. Ask before you use a tool, and disclose its use where the syllabus requires it.