Digital Technology

Course Description

Digital Technology encompasses number systems and conversion; binary arithmetic; Boolean expressions; minterm and maxterm expansion of Boolean functions; minimisation of expressions using Karnaugh maps or the Quine-McCluskey method; multiplexers and decoders; sequential circuits including flip-flops, counters, registers and shift-registers; simulation of digital circuits; and VHDL. Students complete both collaborative and individual projects.

Within the SCNS taxonomy, CET is the Computer Engineering Technology prefix. Daytona State publishes this at 4 credits, offered fall, spring and summer, with MAC1114 as prerequisite, giving approximately 60 contact hours at the prefix's unsuffixed convention.

This is the foundation of the digital design sequence, and it is the course where students first meet the idea that hardware can be described in a language and synthesised rather than wired. That shift — from drawing gates to writing VHDL — is the single most important conceptual step in the sequence, and it is the one students most often resist because the first tool feels concrete and the second does not.

Daytona State does not publish a lecture and laboratory split for its CET courses. The prefix's unsuffixed courses run consistently at 15 contact hours per credit — CET1588, CET2544, CET2691, CET2792, CET2793, CET2794, CET3505 and CET4542 are all published at 3 credits and 45 hours, without exception. Its C-suffixed courses run at 20 or above and its L-suffixed laboratories at 30. This course is unsuffixed and is priced at the unsuffixed convention.

Learning Outcomes

Required Outcomes

• Convert between binary, octal, decimal and hexadecimal number systems.
• Perform binary arithmetic, including addition, subtraction and multiplication.
• Describe signed number representations, including two's complement.
• Describe binary codes, including BCD, Gray and ASCII.
• Apply the postulates and theorems of Boolean algebra.
• Simplify Boolean expressions algebraically.
• Express Boolean functions in minterm and maxterm canonical forms.
• Construct truth tables and derive expressions from them.
• Minimise Boolean expressions using Karnaugh maps.
• Apply the Quine-McCluskey method to minimisation.
• Handle don't-care conditions in minimisation.
• Describe logic gates and their electrical characteristics.
• Design combinational logic circuits from a specification.
• Design and apply multiplexers and demultiplexers.
• Design and apply encoders and decoders.
• Design arithmetic circuits, including adders and comparators.
• Describe latches and flip-flops and their behaviour.
• Analyse and design sequential circuits.
• Design counters, both synchronous and asynchronous.
• Design registers and shift-registers.
• Describe timing, propagation delay, and setup and hold requirements.
• Simulate digital circuits and interpret the results.
• Write basic VHDL to describe combinational and sequential logic.
• Work effectively on a collaborative design project.

Optional Outcomes

• Describe programmable logic devices and their architectures.
• Describe memory devices and their organisation.
• Apply hazard analysis to combinational circuits.
• Describe state machine design at an introductory level.
• Use test benches to verify a design.
• Implement a design on hardware.

Major Topics

Required Topics

• Number systems and conversion
• Binary arithmetic
• Signed number representation
• Binary codes
• Boolean algebra
• Algebraic simplification
• Minterm and maxterm forms
• Truth tables
• Karnaugh map minimisation
• Quine-McCluskey method
• Don't-care conditions
• Logic gates and characteristics
• Combinational design
• Multiplexers and demultiplexers
• Encoders and decoders
• Arithmetic circuits
• Latches and flip-flops
• Sequential circuit analysis and design
• Counters
• Registers and shift-registers
• Timing, delay, setup and hold
• Circuit simulation
• Introductory VHDL
• Collaborative project work

Optional Topics

• Programmable logic devices
• Memory devices and organisation
• Hazard analysis
• Introductory state machines
• Test benches
• Hardware implementation

Resources & Tools

• The programme's laboratory and its isolated network — the only place you can lawfully practise most of this. Use every scheduled hour and every open-lab hour.
• Virtualisation software — VirtualBox is free, VMware Workstation Player is free for personal use; a home lab of virtual machines costs nothing but disk space.
• Kali Linux and the SANS SIFT Workstation — free tool distributions for security testing and forensics respectively.
• Autopsy and The Sleuth Kit (sleuthkit.org) — free and open-source forensic tools used professionally, not merely for teaching.
• NIST Computer Forensics Tool Testing programme (cftt.nist.gov) — free tool validation reports; the reference when you need to defend a tool choice.
• NIST Special Publications, especially SP 800-86 (forensic techniques in incident response) and SP 800-61 (incident handling) — free, authoritative, and directly examinable.
• CISA (cisa.gov) — free advisories, guidance, and free training resources.
• MITRE ATT&CK (attack.mitre.org) — free; the standard framework for describing adversary behaviour, and increasingly expected knowledge.
• TryHackMe, Hack The Box, and OverTheWire — lawful practice environments, with free tiers; the right place to practise offensive technique.
• CompTIA and Cisco Networking Academy materials — aligned to the certifications employers ask for.
• Fundamentals of Logic Design (Roth & Kinney) — the standard text for exactly this syllabus, Quine-McCluskey included.
• Digital Design (Mano & Ciletti) — the other standard, with strong VHDL coverage.
• Xilinx Vivado or Intel Quartus Prime — free editions available; the industry tools for simulation and synthesis.
• Logisim Evolution and EDA Playground — free; useful for quick circuit and HDL experimentation without a full toolchain.

Career Pathways

• Information security analyst — SOC 15-1212; consistently among the fastest-growing occupations.
• Computer network support specialist — SOC 15-1231; computer user support specialist — SOC 15-1232.
• Network and computer systems administrator — SOC 15-1244.
• Digital forensics examiner — in law enforcement, in corporate investigations, and in consulting firms.
• Incident responder and security operations centre analyst — a large and growing entry route into security.
• Electrical and electronics engineering technologist or technician — SOC 17-3023, for the digital design pathway.
• Embedded systems and FPGA development — a specialised, well-paid pathway from the digital design sequence.
• Florida's defence, space, and simulation sector — the Space Coast, Orlando's simulation and training cluster, and Tampa's defence presence all hire heavily in these areas, and many roles require U.S. citizenship and a security clearance.
• Public sector and law enforcement — state and county agencies, and federal offices with a large Florida presence.
• Healthcare, financial services, and hospitality IT — all large Florida sectors with substantial compliance-driven security demand.
• Consulting and managed security service providers.
• ⚠ Many security and forensics roles require a clean background — criminal history, and for cleared work significant unresolved debt or foreign contacts, can be disqualifying. Find this out before investing in the pathway.

Special Information

⚠ Minimisation and simulation are examinable in different ways — practise both

• Karnaugh maps are examined by hand, and there is no substitute for doing dozens of them. Three and four variables should become automatic; five and six require the systematic approach.
• Quine-McCluskey exists because K-maps do not scale. It is tedious by hand and that is the point — it is an algorithm, which is why software does it. Learn it as a procedure you can execute correctly rather than as something to be clever about.
• Don't-care conditions are free simplification and students routinely fail to exploit them.
• Simulate before you conclude. A design that looks right on paper and fails in simulation has a real fault, and finding it is the learning.
• Read the waveform carefully. Most simulation debugging is noticing that a signal changed one clock edge later than you expected.
• Write VHDL to describe hardware, not to execute steps. This is the mistake every programmer makes on first contact — VHDL is concurrent by default, and thinking of it as a sequential program produces designs that cannot be synthesised.
• Keep timing in mind from the start. Propagation delay, setup and hold are what make a design work at speed or fail intermittently — and intermittent failures are the hardest to diagnose.
• Do the collaborative project properly. Agree interfaces and signal names first; most group design failures are integration failures, not design failures.

⚠ Certifications carry real weight in this field — more than in most

• Information technology and security hire on demonstrated capability, and certifications are the common shorthand for it — frequently appearing as hard requirements in job postings and in government and contractor roles.
• Foundational: CompTIA A+ (hardware and operating systems), Network+, and Security+. Security+ in particular satisfies a widely cited U.S. Department of Defense baseline requirement, which makes it valuable in Florida's substantial defence and contractor sector.
• Networking: Cisco CCNA remains the recognised entry credential.
• Digital forensics: EnCE (EnCase), ACE (AccessData), CCE, and the SANS GCFE and GCFA. The SANS credentials are the most respected and by far the most expensive — employers frequently pay for them, so raise it at interview rather than self-funding.
• Security management: CISSP is the senior standard but requires several years of documented experience; SSCP is its practitioner-level counterpart and is reachable earlier.
• Time your certification to your coursework. Sit the examination while the material is fresh — pass rates fall sharply the longer graduates wait.
• Certifications expire. Most require continuing education and renewal, so plan for the ongoing cost.
• ⚠ A certification is not a substitute for the degree, and the degree is not a substitute for certifications. Employers in this field commonly want both, plus evidence you have actually built and broken things.
• Build a home lab and document it. Virtual machines cost nothing, and a candidate who can describe what they built and what went wrong interviews far better than one who lists courses.

How Florida course levels affect transfer

The first digit of an SCNS number denotes the year of offering, not transferability. Courses at the 1000 and 2000 levels transfer transparently between Florida public institutions, and 3000 to 4000 is unproblematic since both are upper division. The boundary that actually matters is 2000 to 3000, where lower-division credit generally cannot satisfy an upper-division requirement.

⚠ That boundary is live in this prefix. Daytona State offers CET courses at the 1000, 2000, 3000 and 4000 levels, the upper-division ones forming part of a bachelor of applied science. A 2000-level CET course does not substitute for its 3000- or 4000-level counterpart even where the subject matter overlaps — compare CET2880C/CET2881C (Data Forensics I and II, lower division) with CET4860/CET4861 (Introduction to and Advanced Digital Forensics, upper division). Confirm with an advisor which lower-division courses feed the BAS.

CET3116 is 4 credits and approximately 60 contact hours, offered fall, spring and summer at Daytona State, with MAC1114 as prerequisite.

⚠ It is an upper-division course; a 1000- or 2000-level digital circuits course such as CET1112C or CET1114C does not substitute for it, though CET1112C is accepted as an alternative prerequisite pathway into CET3198. The sequence continues in CET3198 and CET3198L, then CET4138C.